One of the biggest challenges facing developers of certifiable, safety-critical software applications for MultiCore Processors (MCPs) is managing access to shared resources such as cache. MCPs significantly increase cache contention, causing Worst-Case Execution Times (WCETs) to exceed Average-Case Execution Times (ACETs) by 100 percent or more. Because safety-critical developers must budget for WCETs, tasks on average (critical and noncritical) are allocated more time than they need, resulting in significantly degraded CPU utilization.
To avoid these performance crippling challenges associated with safe multi-core operation, DDC-I has developed its SafeMC Technology for Deos, its DO-178 DAL A Certifiable RTOS (first certification in 1998). SafeMC includes patented cache partitioning technology that enables developers to bound and control interference patterns in a way that alleviates contention and reduces WCETs, thereby maximizing available CPU bandwidth without compromising safety criticality. SafeMC Technology also includes Safe Scheduling capabilities constrain processes into execution windows to minimize cross core resource contention. These capabilities coupled with SafeMC’s other enhancements, delivers industry leading multi-core capabilities, developed specifically for safety critical applications, on a DO-178 certifiable platform for avionics developers worldwide.
Key Advantages of Deos™
- DO-178 certification artifact reuse (leveraging certification credit from prior certifications)
- Time & space partitioning (allows mixed levels of criticality running on the same device)
- Optional ARINC 653 support (delivers the standard avionics interfaces), and optional POSIX support (as required for FACE Safety Base Profile) for enhanced portability, and also allows designers to take advantage of the advanced features of Deos
- Extensive certification pedigree (certified to DO-178 DAL A since 1998)
- Patented slack scheduling technology (allows for full processor utilization)
- Scalable from simple LRUs to complex IMA systems
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