Phoenix, AZ. October 4, 2021. DDC-I, a leading supplier of software and professional services for mission and safety-critical applications, today announced a complimentary webinar focused on creating a multi-core platform for safety critical avionics. The one-hour webinar, titled Overcoming the Challenges of Meeting CAST-32A Objectives for Avionics Software, will highlight techniques such as configuring the memory architecture to minimize cache thrashing, and scheduling applications across multiple cores to minimize shared resource conflicts. The webinar will also showcase automated analysis tools for worst case timing and code coverage aggregation that help manage compliance with the CAST-32A objectives.
The webinar will be held on Tuesday October 5, 2021 at 10:00 AM US Eastern Time.
Register and view the complete abstract & register at https://onlinexperiences.com/Launch/QReg/ShowUUID=A813C546-0AD6-4CF9-B9D0-A6AEDD768620&AffiliateData=DDC-I
“This webinar is a must see for avionics developers who want to utilize the latest multi-core technology while meeting the worst-case execution requirements defined in the FAA’s CAST-32A position paper for Multi-core Processors,” said Greg Rose, vice president of marketing and product management at DDC-I. “Our Deos SafeMC technology coupled with LDRA’s advanced analysis tools uniquely resolves the CAST-32A multicore objectives, enabling developers to achieve unmatched performance and determinism for safety-critical applications.”
Deos™ is a safety-critical embedded RTOS that employs patented slack scheduling, memory pools and cache partitioning to deliver higher CPU utilization than any other certifiable safety-critical COTS RTOS. First certified to DO-178 DAL A in 1998, Deos provides a FACE Safety Base Profile that features hard real-time response, time and space partitioning, and both ARINC-653 and POSIX interfaces.
SafeMC™ technology extends Deos’ advanced capabilities to multiple cores, enabling developers of safety-critical systems to achieve best in class multicore performance without compromising safety-critical task response and guaranteed execution time. SafeMC™ employs a bound multiprocessing (BMP) extension of the symmetric multiprocessing architecture (SMP), safe scheduling and cache partitioning to minimize cross-core contention and interference patterns that affect the performance, safety criticality and certifiability of multicore systems. These features enable avionics systems developers to address issues that could impact the safety, performance and integrity of a software airborne system executing on Multi-Core Processors (MCP), as specified by the Certification Authorities Software Team (CAST) in its Position Paper CAST-32A for Multi-core Processors.
About DDC-I, Inc.
DDC-I, Inc. is a global supplier of real-time operating systems, software development tools, custom software development services, and legacy software system modernization solutions, with a primary focus on mission- and safety-critical applications. DDC-I’s customer base is an impressive “who’s who” in the commercial, military, aerospace, and safety-critical industries. DDC-I offers safety-critical real-time operating systems, compilers, integrated development environments and run-time systems for C, C++, and Ada application development. For more information regarding DDC-I products, contact DDC-I at 4545 E. Shea Blvd, Phoenix, AZ 85028; phone (602) 275-7172; fax (602) 252-6054; e-mail email@example.com or visit https://www.ddci.com/pr2108.