Recorded Web Events

DDC-I offers free web seminars that are available on your schedule. These one hour events are technical reviews on a variety of topics, moderated by industry editors and presented by industry experts.


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Multi-Core

  • Multicore Avionics Interference Identification, Measurement, and Mitigation
    In the current avionics environment, the certification authorities are requiring analysis and evaluation of shared resource interference effects on multicore systems. Identifying, measuring, and mitigating interference these effects in your software is essential for developing a safe effective system. Any software interaction that prevents meeting system/safety/performance requirements is interference. For safety reasons, all time in the system has to be accounted for and unidentified spikes in execution timing could have disastrous results. For business reasons, minimizing those WCET allows for more functionality. This presentation takes a look at shared resource and cache/memory bus contention. The Rapita RVS tool suite is demonstrated to identify and measure interference. Deos SafeScheduling and Cache Partitioning are highlighted as interference mitigation strategies.
  • Solving Multicore Processors CAST-32A Avionics Certification Challenges
    Certification authorities and industry suppliers have invested in numerous studies and discussions over recent years to identify the issues multicore processors pose for safety critical systems. Formalized positions of these efforts are the FAA CAST-32A Position Papers. The crux of this paper (regarding software) focuses on bounding and controlling the interference patterns that exists when processor cores share resources. Unless interference patterns are addressed, real-time operations can be erratic and worse case execution (WCE) times can be longer than in a single core system. This 30 minute webinar will outline CAST-32A from a software perspective, highlighting the challenges of implementing multicore processors for any avionics developer and how to solve them.
  • Out-of-the-Box Solution for Multicore Analysis — A primary challenge designers of modern avionics systems face today is how to implement an efficient means of verifying multicore systems. Specifically, one of the more daunting multicore development tasks is to quantify and optimize an application’s worst-case execution times – especially in the context of multicore interference caused by applications running on other cores that share common resources (e.g. cache, memory, etc.). Up to now, most avionics companies have had to develop or integrate their own tooling for this capability.  This webinar addresses this critical but basic multicore system need.

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Security in Avionics Systems

  • Security in Avionics Systems
    There is a shift in the industry driving avionics manufacturers to provide more interactive connectivity than they have had to in the past. The increasing threat of cyber security attacks in our communication systems is an increasing problem in our society. The avionics industry cannot ignore the fact that the threats are real and they must protect the systems from these attacks.
    To create a secure product, you must first define what the requirements are for the level of security you need. Often these flow down from the system level through a security assessment of the overall system. As part of this process, a security plan is needed that takes into account the entire life cycle of that product. Without a secure foundation of trust in the life cycle of development it will be hard to prove and maintain the product.
    This webinar will address the architectural foundation of Deos, a time and space partitioned RTOS from DDC-I, certified to DO-178 Level A since 1998, and how it can be integrated with cryptography provided by wolfSSL to provide the secure capability required by todays avionics manufacturers.
    We will discuss the following topics:
    · What an RTOS vendor needs to provide for safety and security
    · Deos as a foundation for a secure platform.
    · Secure Boot
    · Secure Update
    · Secure Transport
    · Cryptography (a building block for all of the above)

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DO-178B/C

  • Meeting Modern HMI Challenges
    The Tools, Technology and Techniques You Need to Design and De-risk Safety Critical System Architectures
    Developers of modern avionics cockpit display systems face a myriad of challenges in developing versatile, high-performance HMI’s that are reusable, certifiable, meet the latest standards and deliver the highest degree of safety criticality. This webcast, featuring industry experts in RTOS, graphics, and modeling, will show developers how they can take advantage of modern capabilities and new developments in devices, tools and software to meet these challenges while minimizing risk. Our experts will examine system architecture, modeling, rapid prototyping and validation, as well as performance, reuse, certification, field maintenance, data fusion, and legacy systems. All these will be examined in relation to the latest standards, including, DO-178C, ARINC 653, ARINC 661, DO-297, CAST-32A, and FACE.
  • Enabling Safety Critical Common Compute Platforms with UltraScale+ MPSOC
    In this 60-minute webinar, Xilinx and will present solutions for next generation avionics systems. Today most all avionics suppliers are trying to consolidate systems into common compute platforms, while simultaneously expanding performance and features. The challenges in delivering on this vision include: Enabling scalable reconfigurable common compute platforms include: Managing tradeoffs in component and board level development in relation to size, weight, power, and cost; Meeting safety flow down requirements including those related to radiation effects; Meeting stringent and evolving certification requirements for DO-254, DO-178, and guidance related to multi-core use; Maximizing the reuse of software and hardware modules and associated certification artifacts while ensuring an appropriate level of design integrity and system safety. Through this presentation, Xilinx and its Alliance Program Members, DDC-I and Logicircuit, will present the benefits and features of Xilinx UltraScale+ MPSoC as a reconfigurable common compute platform with flexible and reusable software and hardware modules to satisfy airborne requirements. The concepts and solutions presented can be extended to satisfy a broad range of safety critical, mission critical, and high-reliability systems.
  • Cut DO-178C Avionics Software Costs with Adaptable Data Distribution
    Aircraft avionics are I/O intensive, driven by sensors throughout the aircraft that provide a variety of data types, formats and rates, and these attributes vary from aircraft to aircraft. DDC-I’s data distribution infrastructure isolates applications from the details of the underlying I/O subsystem, enabling developers to craft DO-178C software that can be readily upgraded and reused across multiple platforms with minimal impact on the software and its DO-178C verification evidence.DDC-I’s DO-178 certifiable real-time operating system, Deos, has been delivering the coveted Develop Once Deploy Everywhere (DODE) software capability for avionics for over 15 years. DODE through DDC-I’s data distribution infrastructure allows program managers to maximize reuse, contain costs, and deliver high-quality certifiable software on schedule. The Deos publish/subscribe/data distribution system provides versatile data connections, communicating information in a way that abstracts engineering units, data types and data rates. This separation enables software developers to isolate their software from I/O volatility, thereby minimizing the impact of I/O changes, enhancing reuse and preserving DO-178C verification evidence (such as testing, reviews and analysis) from aircraft to aircraft.This webinar will describes some of the key technologies that enable these capabilities.
  • Navigating the Hurdles of DO-178C Development
    DO-178C is now the standard for virtually all new software flying today. Developing DO-178C avionics software adds a significant effort over standard industry practices. Depending on a company’s current engineering processes, 20% – 70% extra effort to comply is not uncommon. Most of this work is not around writing the software but around verification that the software meets all the requirements. However, sifting through nearly 600 new pages of DO-178C to truly understand compliance is difficult. In this joint webinar by Vector Software and DDC-I, leading industry experts provide fast-paced technical guidance on DO-178C, as well as examples of tools that can be used to aid in productivity while complying with DO-178C guidance, and best practices for achieving success in 2015.
  • Enabling Safety Certification in ARM-based Systems
    Processor technology from ARM has become a game changer for multiple industries, delivering high-performance-per-watt processing and high levels of integration to enable system on a chip (SoC) capability in a low-power device. This combination has been ideal for small form factor systems in avionics, automotive, and medical applications. Now embedded designers in these markets are looking at ways to take advantage of ARM technology to enable safety certification via standards such as FAA DO-178C for avionics systems and MISRA for automotive systems. This webcast of industry experts will look at how ARM-based solutions can not only reduce power but easily utilize the integrated peripherals in safety certification solutions across different industries.
  • A Practitioner’s Guide to DO-178B, Certification and the Emerging DO-178C Standard
    Covering technical tips and techniques for developing safety-critical avionics software in compliance with DO-178B (up to, and including, Level A design assurance), this webinar features industry experts who will highlight the processes, procedures and tools used to achieve avionics certification on the latest civil airliners.
  • Managing Resource Contention in Processors (Multi-core and Single Core) for Safety Critical Avionics Software Applications
    This webinar focuses on the use of cache partitioning to enhance CPU performance in DO-178B-compliant safety-critical avionics software.
  • Avionics Safety and Security Certification Challenges for Military Aircraft
    The current budget-constrained environment in the Department of Defense is forcing many manned aircraft platforms to operate longer than their original planners intended often requiring continued refresh of their avionics hardware and software, which means more opportunities for avionics upgrades. These upgrades will introduce more complex and sophisticated avionics, which will require expensive and time-consuming safety and security certification. FAA safety and security requirements are also starting to extend to unmanned aerial vehicles (UAVs) as the FAA begins to open up the national airspace to them. This webcast of industry experts will discuss how designers are leveraging open architectures, common standards, and more to solve certification issues in this challenging climate.
  • Managing Avionics Safety Certification in UAS Platforms
    Safety certification for avionics hardware and software is an expensive, complicated process, but absolutely necessary to ensure safe skies for commercial aircraft passengers and military jets flying in the national airspace. Now unmanned aircraft flight critical electronics will also have to meet these same safety requirements as the U.S. Federal Aviation Administration (FAA) starts to open up the national airspace to unmanned aerial systems (UASs). While the rules are still being drawn up, embedded software and hardware designers are already looking at ways for UAS platform integrators to solve certification challenges and manage the process of compliance with safety certification standards such as DO-178B & C. This webcast of industry experts will discuss how to enable safety certification of UAS platforms through efficient and cost-effective solutions.

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Software Reuse

  • Enabling Safety Critical Common Compute Platforms with UltraScale+ MPSOC
    In this 60-minute webinar, Xilinx and will present solutions for next generation avionics systems. Today most all avionics suppliers are trying to consolidate systems into common compute platforms, while simultaneously expanding performance and features. The challenges in delivering on this vision include: Enabling scalable reconfigurable common compute platforms include: Managing tradeoffs in component and board level development in relation to size, weight, power, and cost; Meeting safety flow down requirements including those related to radiation effects; Meeting stringent and evolving certification requirements for DO-254, DO-178, and guidance related to multi-core use; Maximizing the reuse of software and hardware modules and associated certification artifacts while ensuring an appropriate level of design integrity and system safety. Through this presentation, Xilinx and its Alliance Program Members, DDC-I and Logicircuit, will present the benefits and features of Xilinx UltraScale+ MPSoC as a reconfigurable common compute platform with flexible and reusable software and hardware modules to satisfy airborne requirements. The concepts and solutions presented can be extended to satisfy a broad range of safety critical, mission critical, and high-reliability systems.
  • Maximizing System Performance in Time and Space Partitioned DO-178 Certifiable Safety-Critical Systems
    ARINC 653 Part 1 (653p1) defines a standard Real-Time Operating System (RTOS) APplication EXecutive (APEX). It provides partitioning and a relatively simple, standards-based API, which facilitate porting and reuse of 653 applications.Priority-preemptive RTOSs offer flexible scheduling models, which allow efficient scheduling of more complex applications. However, very few of these RTOSs support guaranteed execution of tasks, also known as time partitioning.Merging these two models into a hybrid solution offers the best of both worlds: standards-based commonality and advanced features that can yield the highest performance possible for safety-critical software operation.Industry experts from DDC-I (a supplier of software and professional services for mission-/safety-critical applications for over 30 years) will highlight real-time operating system technology that allows developers to merge these two approaches into a hybrid model, and will discuss the resulting benefits.
  • Efficient and Flexible I/O and Inter-Partition Communication For Safety-Critical Avionics Software Applications
    I/O handling and inter-partition communication present challenges to developers of safety-critical avionics systems and software. One particular challenge involves managing the volatility of data handling on typical avionics programs. Even though a given software function may remain unchanged from one aircraft to another, the I/O often changes significantly. For example, the source or destination of a given data item may change, it’s data type and engineering units may change, and so on.Industry experts from DDC-I (a supplier of software and professional services for mission-/safety-critical applications for over 30 years) will discuss a real-time I/O service that allows developers to effectively manage I/O and inter-partition communications in certifiable, safety-critical avionics software applications. It also facilitates verification testing and reuse of certifiable software.
  • Enabling Certified Safety-Critical Software Reuse on Next Generation Avionics and Multi-core Systems
    This webinar covers some of the unique features and capabilities of DDC-I’s Deos, a time and space partitioned safety-critical RTOS. These features and capabilities allow safety-critical software developers to easily reconfigure and adapt their software for reuse in new systems or to reallocate software loads in multi-core environments, without the need to modify that software and re-incur costly certification activities.

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Patented Technology

  • Managing Resource Contention in Processors (Multi-core and Single Core) for Safety Critical Avionics Software Applications
    Contention for shared resources (e.g., L2 cache) typically inflates worst-case execution times (WCETs) for software applications, often significantly. Since safety-critical timing budgets must accommodate WCET behavior, the system’s CPU can be seriously under-utilized with less available bandwidth for value-added functionality.By bounding and controlling the interference patterns that occur between applications contending for shared resources a CPU, WCETs can be reduced, often to near average-case execution time (ACET) performance. Consequently, CPU utilization can be dramatically increased.For example, tests conducted by DDC-I (a supplier of software and professional services for mission-/safety-critical applications for over 30 years) and other avionics software providers have shown that application WCETs can be up to 10x the corresponding ACETs in the face of cache contention. However, by utilizing DDC-I’s patented cache partitioning technology, the same tests show that WCETs are bounded to within 10% of the corresponding ACETs.Industry experts from DDC-I will highlight real-time operating system technology that allows developers to manage cache contention safely, deterministically and efficiently in a single core context, as well as extensions to multicore processors. This cache partitioning technology, tests and results will be discussed during this recorded webcast.